Question
5-10

Senior Physical Design Engineer(7051)

8/29/2025

Responsible for the physical design implementation including PnR run, performance, power, and area comparison, congestion and DRC analysis, and design optimization. The role also involves synthesis, debugging, data analysis, and scripting.

Salary

108000 - 167500 USD

Working Hours

40 hours/week

Company Size

10,001+ employees

Language

English

Visa Sponsorship

No

About The Company
Established in 1987, TSMC is the world's first dedicated semiconductor foundry. As the founder and a leader of the Dedicated IC Foundry segment, TSMC has built its reputation by offering advanced and "More-than-Moore"​ wafer production processes and unparalleled manufacturing efficiency. From its inception, TSMC has consistently offered the foundry segment's leading technologies and TSMC COMPATIBLE® design services. TSMC has consistently experienced strong growth by building solid partnerships with its customers, large and small. IC suppliers from around the world trust TSMC with their manufacturing needs, thanks to its unique integration of cutting-edge process technologies, pioneering design services, manufacturing productivity and product quality. The company's total managed capacity reached above 9 million 12-inch equivalent wafers in 2015. TSMC operates three advanced 12-inch wafer fabs, four eight-inch wafer fabs, one six-inch wafer fab (fab 2) and two backend fabs (advanced backend fab 1 and 2). TSMC also manages two eight-inch fabs at wholly owned subsidiaries: WaferTech in the United States and TSMC China Company Limited. TSMC also obtains eight-inch wafer capacity from other companies in which the Company has an equity interest. TSMC is listed on the Taiwan Stock Exchange (TWSE) under ticker number 2330, and its American Depositary Shares trade on the New York Stock Exchange (NYSE) under the symbol "TSM"​.
About the Role

Overview of Role

As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance/Power/Area (PPA) comparison, congestion & DRC analysis, and design optimization. You may also do synthesis, debugging & data analysis, scripting, STA or timing analysis. You will be reporting to Manager of Advanced Chip implementation team at its San Jose Design Center, California and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.

 

Responsibilities

  • Responsible for the physical implementation on TSMC’s most advanced process nodes.
  • Netlist-to-GDS flow including block/soc-level placement, clock tree synthesis, routing, and design optimization.
  • Evaluate flow and methodologies to optimize power, performance, and area (PPA).
  • Analyze standard cell library utilization and route congestion data.
  • CAD development including customizing design flows and creating comparison tables using scripting language such as TCL, Python, Perl and Shell.

 

 

Minimum Qualifications

  • Master’s degree in Electrical Engineering or Computer Science with a minimum of 4 years of relevant industry experience.
  • In depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation.
  • Knowledge on physical design implementation flows, auto placement and routing (APR), static timing analysis (STA), layout design, physical design verification (PDV), IREM signoff, and CAD development.
  • Experiences in research projects or internship related to RTL coding, synthesis, digital design and testing, physical implementation or design verification
  • In depth knowledge of major EDA tools/design flows.
  • Experience in Python/Perl/TCL language programming and CSH script.
  • Ability to work regularly at a customer site in the South Bay area.

 

Preferred Qualifications

  • Able to independently complete Netlist-GDS P&R.
  • Excellent communication skills and strong problem-solving skills.
  • Positive, Active, Collaborative, Self-motivated, Adaptable and Flexible.
  • TSMC N16 and below technology.
  • Experience in software programming is a plus.

 

Company Description  

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

  • The world’s leading dedicated semiconductor foundry
  • The technology leader with a strong reputation for manufacturing excellence
  • Advancing semiconductor manufacturing innovations to enable the future of technology

 

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.  In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

 

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

 

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at G_Accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis. 

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals.  All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government.

 

Pay Transparency Statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $108,000/yr and $167,500/yr. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location.

 

TSMC’s total compensation package consists of market competitive pay, allowances, bonuses and comprehensive benefits. We also offer extensive development opportunities and programs.

 

Key Skills
Physical Design ImplementationPPA OptimizationCongestion AnalysisDRC AnalysisScriptingSTATiming AnalysisVLSI DesignDigital Integrated CircuitsLogic DesignDesign for TestingComputer ArchitectureDigital Design AutomationEDA ToolsPythonPerlTCL
Benefits
Comprehensive BenefitsAllowancesBonusesDevelopment Opportunities
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