Question
FULL_TIME
0-2

Product Validation Engineer II

1/18/2026

The Product Validation Engineer II will lead Digital Implementation & Signoff engagements with global customers, collaborating with Account Field Teams and R&D teams. This role involves providing customer feedback to help define product roadmaps.

Working Hours

40 hours/week

Company Size

10,001+ employees

Language

English

Visa Sponsorship

No

About The Company
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
About the Role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

### Job Description:
Seeking a highly motivated, customer-facing engineer who can spearhead Digital Implementation & Signoff engagements with top tier global customers working closely with Account Field Teams and R&D teams. The position provides an excellent opportunity to work closely with customer and provide feedback to the R&D team in order to define the roadmap of the products.

The candidate better have:
(1) Prior Designer, Product Engineering or Application Engineering experience in digital implementation (Synthesis, Physical Design, Place and Route) and sign-off (timing/physical)
(2) Understand industry challenges in digital implementation & sign off domain knowledge
(3) Industry Experience with Cadence EDA tools in the IC digital sign-off flow, preferably on EDI, RC and Signoff tools.
(4) Experience in Logic Design and Synthesis, Formal Verification, Low Power design, Physical Design and Timing Closure for block level and Top Level Designs.

 

### Requirement
(1) Requires a BS or MS in EE with 1+ years industry related experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes.
(2) Automation skills using Perl, Tcl and shell scripting essential.
(3) Strong analysis skills required to debug complex timing closure, logical and physical design problems. Ability to perform root-cause analysis to suggest solutions to customers and provide feedback to R&D
(4) Digital Physical Implementation and timing closure skills
(5) Proven track record and experience working in a fast paced environment
(6) Excellent customer interaction skills.

We’re doing work that matters. Help us solve what others can’t.

Key Skills
Digital ImplementationSign-offSynthesisPhysical DesignPlace and RouteTiming ClosureCadence EDA ToolsLogic DesignFormal VerificationLow Power DesignAutomation SkillsPerlTclShell ScriptingRoot-Cause AnalysisCustomer Interaction
Categories
TechnologyEngineeringSoftware
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